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 SSM9974GP,S
N-channel Enhancement-mode Power MOSFET
PRODUCT SUMMARY
BVDSS R DS(ON) ID
DESCRIPTION
The SSM9974 acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM9974GS is in a TO-263 package, which is widely used for commercial and industrial surface-mount applications. The through-hole version, the SSM9974GP in TO-220, is available for vertical mounting, where a small footprint is required on the board, and/or an external heatsink is to be attached. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance.
60V 12m 72A
Pb-free; RoHS-compliant TO-220 and TO-263 (D2PAK)
G D S
G
D S
TO-220 (suffix P)
TO-263 (suffix S)
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VGS ID IDM PD Parameter Drain-source voltage Gate-source voltage Continuous drain current, TC = 25C TC = 100C Pulsed drain current
1
Value 60 20 72 46 300 104 0.8 -55 to 150 -55 to 150
Units V V A A A W W/C C C
Total power dissipation, TC = 25C Linear derating factor
TSTG TJ
Storage temperature range Operating junction temperature range
THERMAL CHARACTERISTICS
Symbol
RJC RJA
Parameter
Maximum thermal resistance, junction-case Maximum thermal resistance, junction-ambient
Value
1.2 62
Units
C/W C/W
Notes:
1.Pulse width must be limited to avoid exceeding the safe operating area. 2.Pulse width <300us, duty cycle <2%.
5/12/2006 Rev.3.1
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SSM9974GP,S
ELECTRICAL CHARACTERISTICS
Symbol BVDSS Parameter Drain-source breakdown voltage
Breakdown voltage temperature coefficient
(at Tj = 25C, unless otherwise specified)
Test Conditions VGS=0V, ID=250uA Reference to 25C, ID=1mA VGS=10V, ID=45A VGS=4.5V, ID=30A Min. 60 1 -
Typ. 0.07 50 43 8 31 14 48 42 67 495 460
1
Max. Units 12 15 3 10 100 100 69 1.5
V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
BV DSS/Tj
RDS(ON)
Static drain-source on-resistance
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Rg
Gate threshold voltage Forward transconductance
VDS=VGS, ID=250uA VDS=10V, ID=30A
Drain-source leakage current
VDS=60V, VGS=0V
VDS=48V ,VGS=0V, Tj = 150C VGS=20V ID=30A VDS=48V VGS=4.5V VDS=30V ID=30A RG=3.3 , VGS=10V RD=1 VGS=0V VDS=25V f=1.0MHz
f=1.0MHz
Gate-source leakage current Total gate charge
2
Gate-source charge Gate-drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Input capacitance Output capacitance Reverse transfer capacitance
Gate Resistance
2
3180 5100
Source-Drain Diode
Symbol VSD trr Qrr Parameter Forward voltage
2
Test Conditions IS=45A, VGS=0V IS=30A, VGS=0V, dI/dt=100A/s
Min. -
Typ. 45 40
Max. Units 1.2 V ns nC
Reverse-recovery time
Reverse-recovery charge
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%.
5/12/2006 Rev.3.1
www.SiliconStandard.com
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SSM9974GP,S
250 125
T C =25 C
200
o
10V 7.0V
100
T C = 150 o C
ID , Drain Current (A)
150
ID , Drain Current (A)
10V 7.0V 5.0V 4.5V
75
5.0V
100
4.5V
50
50
25
V G =3.0V
V G =3.0V
0 0 2 4 6 8 0 0 2 4 6 8
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
20
2.0
I D = 30 A T C =25 o C RDS(ON) (m )
16 1.6
I D =45A V G =10V
Normalized RDS(ON)
2 4 6 8 10
1.2
12
0.8
8
0.4 -50 0 50 100 150
V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
o
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance vs. Junction Temperature
1.8
30
20
Normalized VGS(th) (V)
1.2
T j =150 o C IS(A)
T j =25 o C
10
0.6
0 0 0.2 0.4 0.6 0.8 1 1.2
0.0 -50 0 50 100 150
V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature ( o C)
Fig 5. Forward Characteristic of Reverse Diode
Fig 6. Gate Threshold Voltage vs. Junction Temperature
5/12/2006 Rev.3.1
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3 of 6
SSM9974GP,S
f=1.0MHz
16 10000
I D = 35 A VGS , Gate to Source Voltage (V)
12
V DS =48V V DS =38V V DS =30V C (pF)
1000
C iss
8
C oss
4
C rss
0 0 20 40 60 80
100 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1000
1
Normalized Thermal Response (R thjc)
Duty factor=0.5
100
0.2
ID (A)
100us
0.1
0.1
0.05
1ms
10
PDM
t
0.02
T C =25 C Single Pulse
1 0.1 1 10
o
10ms 100ms DC
100 1000
T
0.01
Duty factor = t/T Peak Tj = PDM x Rthjc + TC
Single Pulse
0.01 0.00001 0.0001 0.001 0.01 0.1 1
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
125
V DS =5V
100
VG
T j =25 o C T j =150 o C
ID , Drain Current (A)
QG 4.5V
75
QGS
50
QGD
25
Charge
0 0 2 4 6 8
Q
V GS , Gate-to-Source Voltage (V)
Fig 11. Transfer Characteristics
5/12/2006 Rev.3.1
Fig 12. Gate Charge Waveform
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SSM9974GP,S
PHYSICAL DIMENSIONS - TO-220
E L2
A
SYMBOLS
Millimeters
MIN NOM MAX
L1
A
4.25 0.65 1.15 0.40 1.00 9.70 ---12.70 2.60 1.00 2.6 14.70 6.30 3.50 8.40
4.48 0.80 1.38 0.50 1.20 10.00 2.54 13.60 2.80 1.40 3.10 15.50 6.50 3.60 8.90
4.70 0.90 1.60 0.60 1.40 10.40 ---14.50 3.00 1.80 3.6 16 6.70 3.70 9.40
L5
c1
b b1 c c1
E
D L4
e
L L1 L2 L3 L4 L5
L3
b1
L
D
b
c
1.All dimensions are in millimeters. 2.Dimensions do not include mold protrusions.
e
PART MARKING - TO-220 and TO-263
PART NUMBER: 9974GP or 9974GS
XXXXXX YWWSSS
DATE/LOT CODE: (YWWSSS) Y = last digit of the year WW = week SSS = lot code sequence
PACKING: Moisture sensitivity level MSL3
TO-263: 800 pcs in antistatic tape on a reel packed inside a moisture barrier bag (MBB). TO-220: 1000pcs in tubes packed inside a moisture barrier bag (MBB).
5/12/2006 Rev.3.1
www.SiliconStandard.com
5 of 6
PHYSICAL DIMENSIONS - TO-263
E
SYMBOLS
Millimeters
MIN NOM MAX
A A1 A2
4.25 0.00 2.20 0.70 1.07 0.30 1.15 8.30 9.70 2.04 ----4.50 -----
4.75 0.15 2.45 0.90 1.27 0.45 1.30 8.90 2.54 1.50 4.90 1.50
5.20 0.30 2.70 1.10 1.47 0.60 1.45 9.40 3.04 ----5.30 ----
D
b b1 c c1
L2
b1 L3 b
D E e L2 L3 L4
10.10 ####
e
L4
A
1.All dimensions are in millimeters. 2.Dimensions do not include mold protrusions.
c1
c A1
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
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